Semiconductor devices such as logic and memory devices are typically fabricated by a sequence of processing steps applied to a substrate or wafer. The various features and multiple structural levels of the semiconductor devices are formed by these processing steps. For example, lithography among others is one semiconductor fabrication process that involves generating a pattern on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield. As design rules and process windows continue to shrink in size, inspection systems are required to capture a wider range of physical defects on wafer surfaces while maintaining high throughput.
Semiconductor devices are increasingly valued based on their energy efficiency, rather than speed alone. For example, energy efficient consumer products are more valuable because they operate at lower temperatures and for longer periods of time on a fixed battery power supply. In another example, energy efficient data servers are in demand to reduce their operating costs. As a result, there is a strong interest to reduce the energy consumption of semiconductor devices.
Leakage current through insulator layers is a major energy loss mechanism of semiconductor devices manufactured at the 65 nm technology node and below. In response, electronic designers and manufacturers are adopting new materials (e.g., hafnium silicate (HfSiO4), nitrided hafnium silicates (HfSiON), hafnium dioxide (HfO2), zirconium silicate (ZrSiO4), etc.) with higher dielectric constants and lower extinction coefficients than traditional materials (e.g., silicon dioxide). These “high-k” materials reduce leakage current and enable the manufacture of smaller sized transistors.
Along with the adoption of new dielectric materials, the need has arisen for measurement tools to characterize the dielectric properties and band structures of high-k materials early in the manufacturing process. More specifically, high throughput monitoring tools are required to monitor and control the deposition of high-k materials during wafer manufacture to ensure a high yield of finished wafers. Early detection of deposition problems is important because the deposition of high-k materials is an early process step of a lengthy and expensive manufacturing process. In some examples, a high-k material is deposited on a wafer at the beginning of a manufacturing process that takes over one month to complete.
Measurements of the material composition of high-k dielectric layers have been used as indicators for process monitoring. For high-k materials such as SiHfON, it was found that differing percentages of nitrogen and hafnium, different deposition temperatures and deposition cycle times, different intermediate layers, etc., produce different dispersion values and different energy band structures. This affects chip performance at the end of the manufacturing process. In some examples, an X-ray spectrometer has been utilized to accurately measure the material composition of high-k dielectric layers. However, X-ray spectroscopy suffers from high cost and low throughput, making it undesireable for use as a high throughput production monitoring tool. In some other examples, dispersion properties of the high-k dielectric layer (e.g., refractive index, n, and extinction coefficient, k) have been used to calculate material composition based on empirical models. This approach has the advantage of lower cost and higher throughput relative to X-ray spectroscopic techniques. One such example is presented in U.S. patent application Ser. No. 13/524,053 assigned to KLA-Tencor Technologies, Corp.
Although the material composition of a high-k material layer is a strong indicator of deposition process parameters, it does not directly correlate with end of line electrical properties, such as leakage current, etc. For example, in the case of SiHfON, a shift of deposition rate and temperature may produce a film with differing structural defects or different band structure while material composition remains unchanged. The resulting structural defects or band structure may adversely increase leakage current, despite the fact that the material composition has not changed. Similarly, a process that produces a different material composition may also result in reduced structural defects and a more favorable band structure. In this case, monitoring based on material composition may result in a false negative result where fault is found based on material composition when in fact the material structure and properties results in reduced leakage current.
Accordingly, it would be advantageous to develop high throughput methods and/or systems for characterizing high-k dielectric layers early in the manufacturing process to identify whether resulting finished wafers will have satisfactory electrical properties.